Feature #17615 ยป ruby-riscv-dump_machine_register.patch
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#endif
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#if defined __linux__
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# if defined __x86_64__ || defined __i386__ || defined __aarch64__ || defined __arm__
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# if defined __x86_64__ || defined __i386__ || defined __aarch64__ || defined __arm__ || defined __riscv
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# define HAVE_PRINT_MACHINE_REGISTERS 1
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# endif
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#elif defined __APPLE__
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| ... | ... | |
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# ifdef __linux__
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# if defined(__x86_64__) || defined(__i386__)
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# define dump_machine_register(reg) (col_count = print_machine_register(mctx->gregs[REG_##reg], #reg, col_count, 80))
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# elif defined(__aarch64__) || defined(__arm__)
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# elif defined(__aarch64__) || defined(__arm__) || defined(__riscv)
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# define dump_machine_register(reg, regstr) (col_count = print_machine_register(reg, regstr, col_count, 80))
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# endif
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# elif defined __APPLE__
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| ... | ... | |
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dump_machine_register(mctx->arm_r10, "r10");
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dump_machine_register(mctx->arm_sp, "sp");
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dump_machine_register(mctx->fault_address, "fault_address");
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# elif defined __riscv
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dump_machine_register(mctx->__gregs[REG_SP], "sp");
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dump_machine_register(mctx->__gregs[REG_S0], "s0");
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dump_machine_register(mctx->__gregs[REG_S1], "s1");
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dump_machine_register(mctx->__gregs[REG_A0], "a0");
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dump_machine_register(mctx->__gregs[REG_A0+1], "a1");
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dump_machine_register(mctx->__gregs[REG_A0+2], "a2");
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dump_machine_register(mctx->__gregs[REG_A0+3], "a3");
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dump_machine_register(mctx->__gregs[REG_A0+4], "a4");
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dump_machine_register(mctx->__gregs[REG_A0+5], "a5");
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dump_machine_register(mctx->__gregs[REG_A0+6], "a6");
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dump_machine_register(mctx->__gregs[REG_A0+7], "a7");
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dump_machine_register(mctx->__gregs[REG_S2], "s2");
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dump_machine_register(mctx->__gregs[REG_S2+1], "s3");
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dump_machine_register(mctx->__gregs[REG_S2+2], "s4");
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dump_machine_register(mctx->__gregs[REG_S2+3], "s5");
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dump_machine_register(mctx->__gregs[REG_S2+4], "s6");
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dump_machine_register(mctx->__gregs[REG_S2+5], "s7");
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dump_machine_register(mctx->__gregs[REG_S2+6], "s8");
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dump_machine_register(mctx->__gregs[REG_S2+7], "s9");
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dump_machine_register(mctx->__gregs[REG_S2+8], "s10");
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dump_machine_register(mctx->__gregs[REG_S2+9], "s11");
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# endif
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}
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# elif defined __APPLE__
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